I/O Timing Report // Design: gdp_fpgaii_top // Package: PQFP208 // ncd File: gdpfpgaii_gdpfpgaii.ncd // Version: Diamond (64-bit) 2.0.1.184 // Written on Fri Nov 22 21:57:50 2013 // M: Minimum Performance Grade // iotiming GDPFPGAII_GDPFPGAII.ncd GDPFPGAII_GDPFPGAII.prf I/O Timing Report (All units are in ns) Worst Case Results across Performance Grades (M, 5): // Input Setup and Hold Times Port Clock Edge Setup Performance_Grade Hold Performance_Grade ---------------------------------------------------------------------- CTS_i clk_i R -0.115 M 2.281 5 IDE_D[0] clk_i R 0.371 5 0.360 5 IDE_D[10] clk_i R 0.054 5 0.608 5 IDE_D[11] clk_i R -0.127 M 0.992 5 IDE_D[12] clk_i R -0.185 M 1.139 5 IDE_D[13] clk_i R -0.185 M 1.139 5 IDE_D[14] clk_i R -0.048 M 0.785 5 IDE_D[15] clk_i R 0.042 5 0.648 5 IDE_D[1] clk_i R 0.626 5 0.154 5 IDE_D[2] clk_i R -0.064 M 0.845 5 IDE_D[3] clk_i R -0.346 M 1.538 5 IDE_D[4] clk_i R -0.136 M 1.025 5 IDE_D[5] clk_i R -0.185 M 1.139 5 IDE_D[6] clk_i R -0.113 M 0.959 5 IDE_D[7] clk_i R 0.265 5 0.449 5 IDE_D[8] clk_i R -0.001 5 0.681 5 IDE_D[9] clk_i R -0.036 M 0.762 5 Ps2Clk_io clk_i R -0.115 M 2.281 5 Ps2Dat_io clk_i R 0.383 5 0.356 5 Ps2MouseClk_io clk_i R -0.115 M 2.281 5 Ps2MouseDat_io clk_i R 0.275 5 0.448 5 RxD_i clk_i R -0.115 M 2.281 5 SD_MISO_i clk_i R 0.121 5 2.281 5 SRAM_DB[0] clk_i R 1.255 5 0.009 5 SRAM_DB[10] clk_i R 0.685 5 0.745 5 SRAM_DB[11] clk_i R 1.011 5 0.458 5 SRAM_DB[12] clk_i R 0.827 5 0.631 5 SRAM_DB[13] clk_i R 0.547 5 0.856 5 SRAM_DB[14] clk_i R 0.421 5 0.745 5 SRAM_DB[15] clk_i R 0.744 5 0.688 5 SRAM_DB[1] clk_i R 2.411 5 0.147 5 SRAM_DB[2] clk_i R 1.202 5 0.281 5 SRAM_DB[3] clk_i R 1.146 5 0.345 5 SRAM_DB[4] clk_i R 1.406 5 0.145 5 SRAM_DB[5] clk_i R 1.427 5 0.118 5 SRAM_DB[6] clk_i R 0.886 5 0.353 5 SRAM_DB[7] clk_i R 0.685 5 0.745 5 SRAM_DB[8] clk_i R 1.002 5 0.228 5 SRAM_DB[9] clk_i R 1.861 5 0.631 5 nkc_ADDR_i[0] clk_i R 2.128 5 2.281 5 nkc_ADDR_i[10] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[11] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[12] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[13] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[14] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[15] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[16] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[17] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[18] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[1] clk_i R 2.126 5 2.281 5 nkc_ADDR_i[2] clk_i R 3.125 5 2.281 5 nkc_ADDR_i[3] clk_i R 2.342 5 2.281 5 nkc_ADDR_i[4] clk_i R 2.340 5 2.281 5 nkc_ADDR_i[5] clk_i R 2.207 5 2.281 5 nkc_ADDR_i[6] clk_i R 3.110 5 2.281 5 nkc_ADDR_i[7] clk_i R 3.705 5 2.281 5 nkc_ADDR_i[8] clk_i R -0.115 M 2.281 5 nkc_ADDR_i[9] clk_i R -0.115 M 2.281 5 nkc_ADDR_i_020_A1 clk_i R 5.378 5 0.624 5 nkc_DB[0] clk_i R -0.115 M 2.281 5 nkc_DB[10] clk_i R -0.115 M 2.281 5 nkc_DB[11] clk_i R -0.115 M 2.281 5 nkc_DB[12] clk_i R -0.115 M 2.281 5 nkc_DB[13] clk_i R -0.115 M 2.281 5 nkc_DB[14] clk_i R -0.115 M 2.281 5 nkc_DB[15] clk_i R -0.115 M 2.281 5 nkc_DB[1] clk_i R -0.115 M 2.281 5 nkc_DB[2] clk_i R -0.115 M 2.281 5 nkc_DB[3] clk_i R -0.115 M 2.281 5 nkc_DB[4] clk_i R -0.115 M 2.281 5 nkc_DB[5] clk_i R -0.115 M 2.281 5 nkc_DB[6] clk_i R -0.115 M 2.281 5 nkc_DB[7] clk_i R -0.115 M 2.281 5 nkc_DB[8] clk_i R -0.115 M 2.281 5 nkc_DB[9] clk_i R -0.115 M 2.281 5 nkc_nIORQ_i clk_i R 5.417 5 -0.468 M nkc_nMEMRQ_i clk_i R 6.273 5 0.119 5 nkc_nRD_i clk_i R 1.922 5 -0.024 5 nkc_nWR_i clk_i R 1.122 5 -0.120 M reset_n_i clk_i R 2.096 5 2.281 5 // Clock to Output Delay Port Clock Edge Max_Delay Performance_Grade Min_Delay Performance_Grade ------------------------------------------------------------------------ Blue_o[0] clk_i R 5.950 5 1.779 M Blue_o[1] clk_i R 5.950 5 1.779 M Blue_o[2] clk_i R 5.950 5 1.779 M Green_o[0] clk_i R 5.950 5 1.779 M Green_o[1] clk_i R 5.950 5 1.779 M Green_o[2] clk_i R 5.950 5 1.779 M IDE_CS0 clk_i R 5.958 5 1.774 M IDE_CS1 clk_i R 5.958 5 1.774 M IDE_D[0] clk_i R 7.427 5 2.105 M IDE_D[10] clk_i R 7.682 5 2.209 M IDE_D[11] clk_i R 8.122 5 2.049 M IDE_D[12] clk_i R 8.122 5 1.975 M IDE_D[13] clk_i R 7.775 5 2.068 M IDE_D[14] clk_i R 7.428 5 2.100 M IDE_D[15] clk_i R 7.428 5 2.174 M IDE_D[1] clk_i R 7.381 5 2.105 M IDE_D[2] clk_i R 7.428 5 2.199 M IDE_D[3] clk_i R 8.122 5 1.975 M IDE_D[4] clk_i R 8.122 5 2.049 M IDE_D[5] clk_i R 7.775 5 2.148 M IDE_D[6] clk_i R 7.775 5 2.177 M IDE_D[7] clk_i R 7.613 5 2.209 M IDE_D[8] clk_i R 7.636 5 2.209 M IDE_D[9] clk_i R 7.428 5 2.199 M IDE_IA[0] clk_i R 5.958 5 1.774 M IDE_IA[1] clk_i R 5.958 5 1.774 M IDE_IA[2] clk_i R 5.958 5 1.774 M IDE_RD clk_i R 5.958 5 1.774 M IDE_WR clk_i R 5.958 5 1.774 M PWM_OUT_o clk_i R 5.950 5 1.779 M Ps2Clk_io clk_i R 9.296 5 2.752 M Ps2Dat_io clk_i R 7.100 5 2.141 M Ps2MouseClk_io clk_i R 8.579 5 2.543 M Ps2MouseDat_io clk_i R 7.100 5 2.141 M RTS_o clk_i R 9.417 5 2.768 M Red_o[0] clk_i R 5.950 5 1.779 M Red_o[1] clk_i R 5.950 5 1.779 M Red_o[2] clk_i R 5.950 5 1.779 M SD_MOSI_o clk_i R 5.950 5 1.779 M SD_SCK_o clk_i R 7.487 5 2.226 M SD_nCS_o[0] clk_i R 5.950 5 1.779 M SD_nCS_o[1] clk_i R 5.950 5 1.779 M SRAM_ADDR[0] clk_i R 12.382 5 2.662 M SRAM_ADDR[10] clk_i R 13.220 5 2.359 M SRAM_ADDR[11] clk_i R 13.007 5 2.328 M SRAM_ADDR[12] clk_i R 14.075 5 2.424 M SRAM_ADDR[13] clk_i R 13.759 5 2.313 M SRAM_ADDR[14] clk_i R 13.585 5 2.363 M SRAM_ADDR[15] clk_i R 14.712 5 2.692 M SRAM_ADDR[16] clk_i R 13.751 5 2.610 M SRAM_ADDR[17] clk_i R 12.995 5 2.582 M SRAM_ADDR[1] clk_i R 12.711 5 2.542 M SRAM_ADDR[2] clk_i R 12.662 5 2.475 M SRAM_ADDR[3] clk_i R 12.779 5 2.772 M SRAM_ADDR[4] clk_i R 12.258 5 2.523 M SRAM_ADDR[5] clk_i R 12.072 5 2.503 M SRAM_ADDR[6] clk_i R 12.072 5 2.513 M SRAM_ADDR[7] clk_i R 12.779 5 2.577 M SRAM_ADDR[8] clk_i R 14.243 5 2.691 M SRAM_ADDR[9] clk_i R 13.361 5 2.292 M SRAM_DB[0] clk_i R 14.198 5 2.692 M SRAM_DB[10] clk_i R 13.815 5 2.558 M SRAM_DB[11] clk_i R 13.486 5 2.509 M SRAM_DB[12] clk_i R 14.188 5 2.750 M SRAM_DB[13] clk_i R 14.070 5 2.721 M SRAM_DB[14] clk_i R 13.332 5 2.789 M SRAM_DB[15] clk_i R 13.122 5 2.669 M SRAM_DB[1] clk_i R 14.129 5 2.729 M SRAM_DB[2] clk_i R 14.628 5 2.763 M SRAM_DB[3] clk_i R 14.567 5 2.793 M SRAM_DB[4] clk_i R 14.244 5 2.889 M SRAM_DB[5] clk_i R 14.124 5 2.601 M SRAM_DB[6] clk_i R 13.587 5 2.889 M SRAM_DB[7] clk_i R 13.670 5 2.567 M SRAM_DB[8] clk_i R 13.670 5 2.593 M SRAM_DB[9] clk_i R 13.670 5 2.488 M SRAM_nBHE clk_i R 13.667 5 2.776 M SRAM_nBLE clk_i R 12.325 5 2.566 M SRAM_nCS0 clk_i R 12.358 5 2.532 M SRAM_nCS1 clk_i R 11.576 5 2.700 M SRAM_nOE clk_i R 12.409 5 2.571 M SRAM_nWR clk_i R 12.823 5 2.700 M TxD_o clk_i R 5.950 5 1.779 M nIRQ_o clk_i R 9.564 5 2.728 M nNMI_o clk_i R 9.154 5 2.579 M nkc_DB[0] clk_i R 19.698 5 2.394 M nkc_DB[10] clk_i R 12.707 5 2.291 M nkc_DB[11] clk_i R 11.398 5 2.292 M nkc_DB[12] clk_i R 12.679 5 2.292 M nkc_DB[13] clk_i R 12.000 5 2.287 M nkc_DB[14] clk_i R 13.008 5 2.289 M nkc_DB[15] clk_i R 12.219 5 2.289 M nkc_DB[1] clk_i R 19.054 5 2.289 M nkc_DB[2] clk_i R 17.810 5 2.423 M nkc_DB[3] clk_i R 17.711 5 2.423 M nkc_DB[4] clk_i R 18.217 5 2.323 M nkc_DB[5] clk_i R 19.770 5 2.394 M nkc_DB[6] clk_i R 17.408 5 2.394 M nkc_DB[7] clk_i R 19.351 5 2.394 M nkc_DB[8] clk_i R 12.397 5 2.323 M nkc_DB[9] clk_i R 12.000 5 2.323 M nkc_nWAIT_o clk_i R 5.958 5 1.752 M